sipm_rocv2.h File Reference

These register maps (or Look-Up Tables – LUTs) were manually written using the HGCROC v2 manual as a reference. More...

#include "register_maps/register_maps_types.h"

Include dependency graph for sipm_rocv2.h:

Go to the source code of this file.

Variables
const Page	sipm_rocv2::GLOBAL_ANALOG_LUT
	The Look Up Table of for the Global Analog sub-blocks of an HGC ROC.
const Page	sipm_rocv2::REFERENCE_VOLTAGE_LUT
	The Look Up Table of for the Reference Voltage sub-blocks of an HGC ROC.
const Page	sipm_rocv2::MASTER_TDC_LUT
	The Look Up Table of for the Master TDC sub-blocks` of an HGC ROC.
const Page	sipm_rocv2::CHANNEL_WISE_LUT
	The Look Up Table of for the individual channel sub-blocks` of an HGC ROC.
const Page	sipm_rocv2::DIGITAL_HALF_LUT
	The Look Up Table of for the Digital Half sub-blocks` of an HGC ROC.
const Page	sipm_rocv2::TOP_LUT
	The Look Up Table of for the Top sub-block of an HGC ROC.
const PageLUT	sipm_rocv2::PAGE_LUT
const ParameterLUT	sipm_rocv2::PARAMETER_LUT
	Entire parameter Look Up Table.

Detailed Description

These register maps (or Look-Up Tables – LUTs) were manually written using the HGCROC v2 manual as a reference.

The other register maps for later versions of the HGCROC are generated using a python script which parses a YAML file that is more easily compared to the manual and is obtained from CMS folks.

Variable Documentation

DIGITAL_HALF_LUT

const Page sipm_rocv2::DIGITAL_HALF_LUT

Initial value:

= Page::Mapping(
    {{"SELRAWDATA", Parameter(0, 0, 1, 1)},
     {"SELTC4", Parameter(0, 1, 1, 1)},
     {"CMDSELEDGE", Parameter(0, 2, 1, 1)},
     {"ADC_TH", Parameter(0, 4, 4, 0)},
     {"MULTFACTOR", Parameter(1, 0, 5, 0b11001)},
     {"L1OFFSET",
      Parameter({RegisterLocation(2, 0, 8), RegisterLocation(1, 7, 1)},
                0b000001000)},
     {"IDLEFRAME",
      Parameter({RegisterLocation(3, 0, 8), RegisterLocation(4, 0, 8),
                 RegisterLocation(5, 0, 8), RegisterLocation(6, 0, 4)},
                0b1100110011001100110011001100)},
     {"BYPASSCH0", Parameter(6, 4, 1, 0)},
     {"BYPASSCH17", Parameter(6, 5, 1, 0)},
     {"BYPASSCH35", Parameter(6, 6, 1, 0)},
     {"TOT_TH0", Parameter(7, 0, 8, 0)},
     {"TOT_TH1", Parameter(8, 0, 8, 0)},
     {"TOT_TH2", Parameter(9, 0, 8, 0)},
     {"TOT_TH3", Parameter(10, 0, 8, 0)},
     {"TOT_P0", Parameter(11, 0, 7, 0)},
     {"TOT_P1", Parameter(12, 0, 7, 0)},
     {"TOT_P2", Parameter(13, 0, 7, 0)},
     {"TOT_P3", Parameter(14, 0, 7, 0)}})

The Look Up Table of for the Digital Half sub-blocks` of an HGC ROC.

PAGE_LUT

const PageLUT sipm_rocv2::PAGE_LUT

Initial value:

=
    PageLUT::Mapping({{"GLOBAL_ANALOG", GLOBAL_ANALOG_LUT},
                      {"REFERENCE_VOLTAGE", REFERENCE_VOLTAGE_LUT},
                      {"MASTER_TDC", MASTER_TDC_LUT},
                      {"DIGITAL_HALF", DIGITAL_HALF_LUT},
                      {"TOP", TOP_LUT},
                      {"CHANNEL_WISE", CHANNEL_WISE_LUT}})

REFERENCE_VOLTAGE_LUT

const Page sipm_rocv2::REFERENCE_VOLTAGE_LUT

Initial value:

= Page::Mapping(
    {{"PROBE_VREF_PA", Parameter(0, 0, 1, 0)},
     {"PROBE_VREF_TIME", Parameter(0, 1, 1, 0)},
     {"REFI", Parameter(0, 2, 2, 0b11)},
     {"VBG_1V", Parameter(0, 4, 3, 0b111)},
     {"ON_DAC", Parameter(0, 7, 1, 1)},
     {"NOINV_VREF",
      Parameter({RegisterLocation(1, 0, 2), RegisterLocation(5, 0, 8)},
                0b0100111100)},
     {"INV_VREF",
      Parameter({RegisterLocation(1, 2, 2), RegisterLocation(4, 0, 8)},
                0b0110000000)},
     {"TOA_VREF",
      Parameter({RegisterLocation(1, 4, 2), RegisterLocation(3, 0, 8)},
                0b0001110000)},
     {"TOT_VREF",
      Parameter({RegisterLocation(1, 6, 2), RegisterLocation(2, 0, 8)},
                0b0110110000)},
     {"CALIB_DAC",
      Parameter({RegisterLocation(6, 0, 8), RegisterLocation(7, 0, 4)}, 0)},
     {"INTCTEST", Parameter(7, 6, 1, 0)},
     {"EXTCTEST", Parameter(7, 7, 1, 0)},
     {"PROBE_DC", Parameter(8, 0, 8, 0)}})

The Look Up Table of for the Reference Voltage sub-blocks of an HGC ROC.

TOP_LUT

const Page sipm_rocv2::TOP_LUT

Initial value:

=
    Page::Mapping({{"EN_LOCK_CONTROL", Parameter(0, 0, 1, 1)},
                   {"ERROR_LIMIT_SC", Parameter(0, 1, 3, 0b010)},
                   {"SEL_PLL_LOCKED", Parameter(0, 4, 1, 1)},
                   {"PLLLOCKEDSC", Parameter(0, 5, 1, 1)},
                   {"ORBITSYNC_SC", Parameter(0, 7, 1, 0)},
                   {"EN_PLL", Parameter(1, 0, 1, 1)},
                   {"DIV_PLL", Parameter(1, 1, 2, 0)},
                   {"EN_HIGH_CAPA", Parameter(1, 3, 1, 0)},
                   {"EN_REF_BG", Parameter(1, 4, 1, 1)},
                   {"VOUT_INIT_EN", Parameter(1, 5, 1, 0)},
                   {"VOUT_INIT_EXT_EN", Parameter(2, 0, 1, 0)},
                   {"VOUT_INIT_EXT_D", Parameter(2, 1, 5, 0)},
                   {"FOLLOWER_PLL_EN", Parameter(3, 0, 1, 1)},
                   {"BIAS_I_PLL_D", Parameter(3, 1, 6, 0b011000)},
                   {"SEL_40M_EXT", Parameter(3, 7, 1, 0)},
                   {"PLL_PROBE_AMPLITUDE", Parameter(4, 0, 3, 0b011)},
                   {"PLL_PROBE_PRE_SCALE", Parameter(4, 3, 3, 0)},
                   {"PLL_PROBE_PRE_PHASE", Parameter(4, 6, 2, 0)},
                   {"ET_AMPLITUDE", Parameter(5, 0, 3, 0b011)},
                   {"ET_PRE_SCALE", Parameter(5, 3, 3, 0)},
                   {"ET_PRE_PHASE", Parameter(5, 6, 2, 0)},
                   {"SEL_RESYNC_FCMD", Parameter(6, 0, 1, 1)},
                   {"SEL_L1_FCMD", Parameter(6, 1, 1, 1)},
                   {"SEL_STROBE_FCMD", Parameter(6, 2, 1, 1)},
                   {"SEL_ORBITSYNC_FCMD", Parameter(6, 3, 1, 1)},
                   {"EN_PHASESHIFT", Parameter(7, 0, 1, 1)},
                   {"PHASE", Parameter(7, 1, 4, 0)},
                   {"EN_PLL_EXT", Parameter(7, 7, 1, 0)}})

The Look Up Table of for the Top sub-block of an HGC ROC.