pflib v3.9.0-rc3-11-g2537d8f
Pretty Fine HGCROC Interaction Library
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sipm_rocv2.h
Go to the documentation of this file.
1
12
13namespace sipm_rocv2 {
14
20 Page::Mapping({{"ON_DAC_TRIM", Parameter(0, 0, 1, 1)},
21 {"ON_INPUT_DAC", Parameter(0, 1, 1, 1)},
22 {"ON_CONV", Parameter(0, 2, 1, 1)},
23 {"ON_PA", Parameter(0, 3, 1, 1)},
24 {"GAIN_CONV", Parameter(0, 4, 4, 0b0100)},
25 {"ON_RTR", Parameter(1, 0, 1, 1)},
26 {"SW_SUPER_CONV", Parameter(1, 1, 1, 1)},
27 {"DACB_VB_CONV", Parameter(1, 2, 6, 0b110011)},
28 {"ON_TOA", Parameter(2, 0, 1, 1)},
29 {"ON_TOT", Parameter(2, 1, 1, 1)},
30 {"DACB_VBI_PA", Parameter(2, 2, 6, 0b011111)},
31 {"IBI_SK", Parameter(3, 0, 2, 0)},
32 {"IBO_SK", Parameter(3, 2, 6, 0b001010)},
33 {"IBI_INV", Parameter(4, 0, 2, 0)},
34 {"IBO_INV", Parameter(4, 2, 6, 0b001010)},
35 {"IBI_NOINV", Parameter(5, 0, 2, 0)},
36 {"IBO_NOINV", Parameter(5, 2, 6, 0b001010)},
37 {"IBI_INV_BUF", Parameter(6, 0, 2, 0b11)},
38 {"IBO_INV_BUF", Parameter(6, 2, 6, 0b100110)},
39 {"IBI_NOINV_BUF", Parameter(7, 0, 2, 0b11)},
40 {"IBO_NOINV_BUF", Parameter(7, 2, 6, 0b100110)},
41 {"SW_CD", Parameter(8, 0, 3, 0b111)},
42 {"EN_HYST_TOT", Parameter(8, 3, 1, 0)},
43 {"SW_CF_COMP", Parameter(8, 4, 4, 0b1010)},
44 {"SW_CF", Parameter(9, 0, 4, 0b1010)},
45 {"SW_RF", Parameter(9, 4, 4, 0b1000)},
46 {"CLR_SHAPERTAIL", Parameter(10, 1, 1, 0)},
47 {"SELRISINGEDGE", Parameter(10, 2, 1, 1)},
48 {"SELEXTADC", Parameter(10, 3, 1, 0)},
49 {"CLR_ADC", Parameter(10, 4, 1, 0)},
50 {"S_SK", Parameter(10, 5, 3, 0b010)},
51 {"S_INV", Parameter(11, 2, 3, 0b010)},
52 {"S_NOINV", Parameter(11, 5, 3, 0b010)},
53 {"S_INV_BUF", Parameter(12, 2, 3, 0b110)},
54 {"S_NOINV_BUF", Parameter(12, 5, 3, 0b110)},
55 {"REF_ADC", Parameter(13, 0, 2, 0)},
56 {"DELAY40", Parameter(13, 2, 3, 0)},
57 {"DELAY65", Parameter(13, 5, 3, 0)},
58 {"ON_REF_ADC", Parameter(14, 0, 1, 1)},
59 {"POL_ADC", Parameter(14, 1, 1, 1)},
60 {"DELAY87", Parameter(14, 2, 3, 0)},
61 {"DELAY9", Parameter(14, 5, 3, 0)}});
62
68 {{"PROBE_VREF_PA", Parameter(0, 0, 1, 0)},
69 {"PROBE_VREF_TIME", Parameter(0, 1, 1, 0)},
70 {"REFI", Parameter(0, 2, 2, 0b11)},
71 {"VBG_1V", Parameter(0, 4, 3, 0b111)},
72 {"ON_DAC", Parameter(0, 7, 1, 1)},
73 {"NOINV_VREF",
74 Parameter({RegisterLocation(1, 0, 2), RegisterLocation(5, 0, 8)},
75 0b0100111100)},
76 {"INV_VREF",
77 Parameter({RegisterLocation(1, 2, 2), RegisterLocation(4, 0, 8)},
78 0b0110000000)},
79 {"TOA_VREF",
80 Parameter({RegisterLocation(1, 4, 2), RegisterLocation(3, 0, 8)},
81 0b0001110000)},
82 {"TOT_VREF",
83 Parameter({RegisterLocation(1, 6, 2), RegisterLocation(2, 0, 8)},
84 0b0110110000)},
85 {"CALIB_DAC",
86 Parameter({RegisterLocation(6, 0, 8), RegisterLocation(7, 0, 4)}, 0)},
87 {"INTCTEST", Parameter(7, 6, 1, 0)},
88 {"EXTCTEST", Parameter(7, 7, 1, 0)},
89 {"PROBE_DC", Parameter(8, 0, 8, 0)}});
90
96 {{"GLOBAL_TA_SELECT_GAIN_TOA", Parameter(0, 0, 4, 0b0011)},
97 {"GLOBAL_TA_SELECT_GAIN_TOT", Parameter(0, 4, 4, 0b0011)},
98 {"GLOBAL_MODE_NO_TOT_SUB", Parameter(1, 0, 1, 0)},
99 {"GLOBAL_LATENCY_TIME", Parameter(1, 1, 4, 0b1010)},
100 {"GLOBAL_MODE_FTDC_TOA_S0", Parameter(1, 5, 1, 0)},
101 {"GLOBAL_MODE_FTDC_TOA_S1", Parameter(1, 6, 1, 1)},
102 {"GLOBAL_SEU_TIME_OUT", Parameter(1, 7, 1, 1)},
103 {"BIAS_FOLLOWER_CAL_P_D", Parameter(2, 0, 4, 0)},
104 {"BIAS_FOLLOWER_CAL_P_EN", Parameter(2, 4, 1, 0)},
105 {"INV_FRONT_40MHZ", Parameter(2, 5, 1, 0)},
106 {"START_COUNTER", Parameter(2, 6, 1, 1)},
107 {"CALIB_CHANNEL_DLL", Parameter(2, 7, 1, 0)},
108 {"VD_CTDC_P_D", Parameter(3, 0, 5, 0)},
109 {"VD_CTDC_P_DAC_EN", Parameter(3, 5, 1, 0)},
110 {"EN_MASTER_CTDC_VOUT_INIT", Parameter(3, 6, 1, 0)},
111 {"EN_MASTER_CTDC_DLL", Parameter(3, 7, 1, 1)},
112 {"BIAS_CAL_DAC_CTDC_P_D",
113 Parameter({RegisterLocation(4, 0, 2), RegisterLocation(7, 6, 2)},
114 0b0000)},
115 {"CTDC_CALIB_FREQUENCY", Parameter(4, 2, 6, 0b000010)},
116 {"GLOBAL_MODE_TOA_DIRECT_OUTPUT", Parameter(5, 0, 1, 0)},
117 {"BIAS_I_CTDC_D", Parameter(5, 1, 6, 0b011000)},
118 {"FOLLOWER_CTDC_EN", Parameter(5, 7, 1, 1)},
119 {"GLOBAL_EN_BUFFER_CTDC", Parameter(6, 0, 1, 0)},
120 {"VD_CTDC_N_FORCE_MAX", Parameter(6, 1, 1, 1)},
121 {"VD_CTDC_N_D", Parameter(6, 2, 5, 0)},
122 {"VD_CTDC_N_DAC_EN", Parameter(6, 7, 1, 0)},
123 {"CTRL_IN_REF_CTDC_P_D", Parameter(7, 0, 5, 0)},
124 {"CTRL_IN_REF_CTDC_P_EN", Parameter(7, 5, 1, 0)},
125 {"CTRL_IN_SIG_CTDC_P_D", Parameter(8, 0, 5, 0)},
126 {"CTRL_IN_SIG_CTDC_P_EN", Parameter(8, 5, 1, 0)},
127 {"GLOBAL_INIT_DAC_B_CTDC", Parameter(8, 6, 1, 0)},
128 {"BIAS_CAL_DAC_CTDC_P_EN", Parameter(8, 7, 1, 0)},
129 {"VD_FTDC_P_D", Parameter(9, 0, 5, 0)},
130 {"VD_FTDC_P_DAC_EN", Parameter(9, 5, 1, 0)},
131 {"EN_MASTER_FTDC_VOUT_INIT", Parameter(9, 6, 1, 0)},
132 {"EN_MASTER_FTDC_DLL", Parameter(9, 7, 1, 1)},
133 {"BIAS_CAL_DAC_FTDC_P_D",
134 Parameter({RegisterLocation(10, 0, 2), RegisterLocation(14, 6, 2)},
135 0b0000)},
136 {"FTDC_CALIB_FREQUENCY", Parameter(10, 2, 6, 0b000010)},
137 {"EN_REF_BG", Parameter(11, 0, 1, 1)},
138 {"BIAS_I_FTDC_D", Parameter(11, 1, 6, 0b011000)},
139 {"FOLLOWER_FTDC_EN", Parameter(11, 7, 1, 1)},
140 {"GLOBAL_EN_BUFFER_FTDC", Parameter(12, 0, 1, 0)},
141 {"VD_FTDC_N_FORCE_MAX", Parameter(12, 1, 1, 1)},
142 {"VD_FTDC_N_D", Parameter(12, 2, 5, 0)},
143 {"VD_FTDC_N_DAC_EN", Parameter(12, 7, 1, 0)},
144 {"CTRL_IN_SIG_FTDC_P_D", Parameter(13, 0, 5, 0)},
145 {"CTRL_IN_SIG_FTDC_P_EN", Parameter(13, 5, 1, 0)},
146 {"GLOBAL_INIT_DAC_B_FTDC", Parameter(13, 6, 1, 0)},
147 {"BIAS_CAL_DAC_FTDC_P_EN", Parameter(13, 7, 1, 0)},
148 {"CTRL_IN_REF_FTDC_P_D", Parameter(14, 0, 5, 0)},
149 {"CTRL_IN_REF_FTDC_P_EN", Parameter(14, 5, 1, 0)},
150 {"GLOBAL_DISABLE_TOT_LIMIT", Parameter(15, 0, 1, 0)},
151 {"GLOBAL_FORCE_EN_CLK", Parameter(15, 1, 1, 0)},
152 {"GLOBAL_FORCE_EN_OUTPUT_DATA", Parameter(15, 2, 1, 0)},
153 {"GLOBAL_FORCE_EN_TOT", Parameter(15, 3, 1, 0)}});
154
160 {{"INPUTDAC", Parameter(0, 0, 6, 0b011111)},
161 {"DACB", Parameter({RegisterLocation(2, 6, 2), RegisterLocation(1, 6, 2),
162 RegisterLocation(0, 6, 2)},
163 0b111111)},
164 {"SIGN_DAC", Parameter(1, 0, 1, 0)},
165 {"REF_DAC_TOA", Parameter(1, 1, 5, 0)},
166 {"PROBE_NOINV", Parameter(2, 0, 1, 0)},
167 {"REF_DAC_TOT", Parameter(2, 1, 5, 0)},
168 {"MASK_TOA", Parameter(3, 0, 1, 0)},
169 {"REF_DAC_INV", Parameter(3, 1, 5, 0)},
170 {"SEL_TRIGGER_TOA", Parameter(3, 6, 1, 0)},
171 {"PROBE_INV", Parameter(3, 7, 1, 0)},
172 {"PROBE_PA", Parameter(4, 0, 1, 0)},
173 {"LOWRANGE", Parameter(4, 1, 1, 0)},
174 {"HIGHRANGE", Parameter(4, 2, 1, 0)},
175 {"CHANNEL_OFF", Parameter(4, 3, 1, 0)},
176 {"SEL_TRIGGER_TOT", Parameter(4, 4, 1, 0)},
177 {"MASK_TOT", Parameter(4, 5, 1, 0)},
178 {"PROBE_TOT", Parameter(4, 6, 1, 0)},
179 {"PROBE_TOA", Parameter(4, 7, 1, 0)},
180 {"DAC_CAL_FTDC_TOA", Parameter(5, 0, 6, 0)},
181 {"MASK_ADC", Parameter(5, 7, 1, 0)},
182 {"DAC_CAL_CTDC_TOA", Parameter(6, 0, 6, 0)},
183 {"DAC_CAL_FTDC_TOT", Parameter(7, 0, 6, 0)},
184 {"DAC_CAL_CTDC_TOT", Parameter(8, 0, 6, 0)},
185 {"IN_FTDC_ENCODER_TOA", Parameter(9, 0, 6, 0)},
186 {"IN_FTDC_ENCODER_TOT", Parameter(10, 0, 6, 0)},
187 {"DIS_TDC", Parameter(10, 7, 1, 0)},
188 {"EXTDATA",
189 Parameter({RegisterLocation(13, 0, 8), RegisterLocation(11, 0, 2)}, 0)},
190 {"MASK_ALIGNBUFFER", Parameter(11, 7, 1, 0)},
191 {"ADC_PEDESTAL", Parameter(12, 0, 8, 0)}});
192
198 {{"SELRAWDATA", Parameter(0, 0, 1, 1)},
199 {"SELTC4", Parameter(0, 1, 1, 1)},
200 {"CMDSELEDGE", Parameter(0, 2, 1, 1)},
201 {"ADC_TH", Parameter(0, 4, 4, 0)},
202 {"MULTFACTOR", Parameter(1, 0, 5, 0b11001)},
203 {"L1OFFSET",
204 Parameter({RegisterLocation(2, 0, 8), RegisterLocation(1, 7, 1)},
205 0b000001000)},
206 {"IDLEFRAME",
207 Parameter({RegisterLocation(3, 0, 8), RegisterLocation(4, 0, 8),
208 RegisterLocation(5, 0, 8), RegisterLocation(6, 0, 4)},
209 0b1100110011001100110011001100)},
210 {"BYPASSCH0", Parameter(6, 4, 1, 0)},
211 {"BYPASSCH17", Parameter(6, 5, 1, 0)},
212 {"BYPASSCH35", Parameter(6, 6, 1, 0)},
213 {"TOT_TH0", Parameter(7, 0, 8, 0)},
214 {"TOT_TH1", Parameter(8, 0, 8, 0)},
215 {"TOT_TH2", Parameter(9, 0, 8, 0)},
216 {"TOT_TH3", Parameter(10, 0, 8, 0)},
217 {"TOT_P0", Parameter(11, 0, 7, 0)},
218 {"TOT_P1", Parameter(12, 0, 7, 0)},
219 {"TOT_P2", Parameter(13, 0, 7, 0)},
220 {"TOT_P3", Parameter(14, 0, 7, 0)}});
221
227 Page::Mapping({{"EN_LOCK_CONTROL", Parameter(0, 0, 1, 1)},
228 {"ERROR_LIMIT_SC", Parameter(0, 1, 3, 0b010)},
229 {"SEL_PLL_LOCKED", Parameter(0, 4, 1, 1)},
230 {"PLLLOCKEDSC", Parameter(0, 5, 1, 1)},
231 {"ORBITSYNC_SC", Parameter(0, 7, 1, 0)},
232 {"EN_PLL", Parameter(1, 0, 1, 1)},
233 {"DIV_PLL", Parameter(1, 1, 2, 0)},
234 {"EN_HIGH_CAPA", Parameter(1, 3, 1, 0)},
235 {"EN_REF_BG", Parameter(1, 4, 1, 1)},
236 {"VOUT_INIT_EN", Parameter(1, 5, 1, 0)},
237 {"VOUT_INIT_EXT_EN", Parameter(2, 0, 1, 0)},
238 {"VOUT_INIT_EXT_D", Parameter(2, 1, 5, 0)},
239 {"FOLLOWER_PLL_EN", Parameter(3, 0, 1, 1)},
240 {"BIAS_I_PLL_D", Parameter(3, 1, 6, 0b011000)},
241 {"SEL_40M_EXT", Parameter(3, 7, 1, 0)},
242 {"PLL_PROBE_AMPLITUDE", Parameter(4, 0, 3, 0b011)},
243 {"PLL_PROBE_PRE_SCALE", Parameter(4, 3, 3, 0)},
244 {"PLL_PROBE_PRE_PHASE", Parameter(4, 6, 2, 0)},
245 {"ET_AMPLITUDE", Parameter(5, 0, 3, 0b011)},
246 {"ET_PRE_SCALE", Parameter(5, 3, 3, 0)},
247 {"ET_PRE_PHASE", Parameter(5, 6, 2, 0)},
248 {"SEL_RESYNC_FCMD", Parameter(6, 0, 1, 1)},
249 {"SEL_L1_FCMD", Parameter(6, 1, 1, 1)},
250 {"SEL_STROBE_FCMD", Parameter(6, 2, 1, 1)},
251 {"SEL_ORBITSYNC_FCMD", Parameter(6, 3, 1, 1)},
252 {"EN_PHASESHIFT", Parameter(7, 0, 1, 1)},
253 {"PHASE", Parameter(7, 1, 4, 0)},
254 {"EN_PLL_EXT", Parameter(7, 7, 1, 0)}});
255
256const PageLUT PAGE_LUT =
257 PageLUT::Mapping({{"GLOBAL_ANALOG", GLOBAL_ANALOG_LUT},
258 {"REFERENCE_VOLTAGE", REFERENCE_VOLTAGE_LUT},
259 {"MASTER_TDC", MASTER_TDC_LUT},
260 {"DIGITAL_HALF", DIGITAL_HALF_LUT},
261 {"TOP", TOP_LUT},
262 {"CHANNEL_WISE", CHANNEL_WISE_LUT}});
263
268 {{"GLOBAL_ANALOG_0", {297, GLOBAL_ANALOG_LUT}},
269 {"REFERENCE_VOLTAGE_0", {296, REFERENCE_VOLTAGE_LUT}},
270 {"GLOBAL_ANALOG_0", {297, GLOBAL_ANALOG_LUT}},
271 {"MASTER_TDC_0", {298, MASTER_TDC_LUT}},
272 {"DIGITAL_HALF_0", {299, DIGITAL_HALF_LUT}},
273 {"REFERENCE_VOLTAGE_1", {40, REFERENCE_VOLTAGE_LUT}},
274 {"GLOBAL_ANALOG_1", {41, GLOBAL_ANALOG_LUT}},
275 {"MASTER_TDC_1", {42, MASTER_TDC_LUT}},
276 {"DIGITAL_HALF_1", {43, DIGITAL_HALF_LUT}},
277 {"TOP", {44, TOP_LUT}},
278 {"CM0", {275, CHANNEL_WISE_LUT}},
279 {"CM1", {276, CHANNEL_WISE_LUT}},
280 {"CALIB0", {274, CHANNEL_WISE_LUT}},
281 {"CM2", {19, CHANNEL_WISE_LUT}},
282 {"CM3", {20, CHANNEL_WISE_LUT}},
283 {"CALIB1", {18, CHANNEL_WISE_LUT}},
284 {"CHANNEL_0", {261, CHANNEL_WISE_LUT}},
285 {"CHANNEL_1", {260, CHANNEL_WISE_LUT}},
286 {"CHANNEL_2", {259, CHANNEL_WISE_LUT}},
287 {"CHANNEL_3", {258, CHANNEL_WISE_LUT}},
288 {"CHANNEL_4", {265, CHANNEL_WISE_LUT}},
289 {"CHANNEL_5", {264, CHANNEL_WISE_LUT}},
290 {"CHANNEL_6", {263, CHANNEL_WISE_LUT}},
291 {"CHANNEL_7", {262, CHANNEL_WISE_LUT}},
292 {"CHANNEL_8", {269, CHANNEL_WISE_LUT}},
293 {"CHANNEL_9", {268, CHANNEL_WISE_LUT}},
294 {"CHANNEL_10", {267, CHANNEL_WISE_LUT}},
295 {"CHANNEL_11", {266, CHANNEL_WISE_LUT}},
296 {"CHANNEL_12", {273, CHANNEL_WISE_LUT}},
297 {"CHANNEL_13", {272, CHANNEL_WISE_LUT}},
298 {"CHANNEL_14", {271, CHANNEL_WISE_LUT}},
299 {"CHANNEL_15", {270, CHANNEL_WISE_LUT}},
300 {"CHANNEL_16", {294, CHANNEL_WISE_LUT}},
301 {"CHANNEL_17", {256, CHANNEL_WISE_LUT}},
302 {"CHANNEL_18", {277, CHANNEL_WISE_LUT}},
303 {"CHANNEL_19", {295, CHANNEL_WISE_LUT}},
304 {"CHANNEL_20", {278, CHANNEL_WISE_LUT}},
305 {"CHANNEL_21", {279, CHANNEL_WISE_LUT}},
306 {"CHANNEL_22", {280, CHANNEL_WISE_LUT}},
307 {"CHANNEL_23", {281, CHANNEL_WISE_LUT}},
308 {"CHANNEL_24", {282, CHANNEL_WISE_LUT}},
309 {"CHANNEL_25", {283, CHANNEL_WISE_LUT}},
310 {"CHANNEL_26", {284, CHANNEL_WISE_LUT}},
311 {"CHANNEL_27", {285, CHANNEL_WISE_LUT}},
312 {"CHANNEL_28", {286, CHANNEL_WISE_LUT}},
313 {"CHANNEL_29", {287, CHANNEL_WISE_LUT}},
314 {"CHANNEL_30", {288, CHANNEL_WISE_LUT}},
315 {"CHANNEL_31", {289, CHANNEL_WISE_LUT}},
316 {"CHANNEL_32", {290, CHANNEL_WISE_LUT}},
317 {"CHANNEL_33", {291, CHANNEL_WISE_LUT}},
318 {"CHANNEL_34", {292, CHANNEL_WISE_LUT}},
319 {"CHANNEL_35", {293, CHANNEL_WISE_LUT}},
320 {"CHANNEL_36", {5, CHANNEL_WISE_LUT}},
321 {"CHANNEL_37", {4, CHANNEL_WISE_LUT}},
322 {"CHANNEL_38", {3, CHANNEL_WISE_LUT}},
323 {"CHANNEL_39", {2, CHANNEL_WISE_LUT}},
324 {"CHANNEL_40", {9, CHANNEL_WISE_LUT}},
325 {"CHANNEL_41", {8, CHANNEL_WISE_LUT}},
326 {"CHANNEL_42", {7, CHANNEL_WISE_LUT}},
327 {"CHANNEL_43", {6, CHANNEL_WISE_LUT}},
328 {"CHANNEL_44", {13, CHANNEL_WISE_LUT}},
329 {"CHANNEL_45", {12, CHANNEL_WISE_LUT}},
330 {"CHANNEL_46", {11, CHANNEL_WISE_LUT}},
331 {"CHANNEL_47", {10, CHANNEL_WISE_LUT}},
332 {"CHANNEL_48", {17, CHANNEL_WISE_LUT}},
333 {"CHANNEL_49", {16, CHANNEL_WISE_LUT}},
334 {"CHANNEL_50", {15, CHANNEL_WISE_LUT}},
335 {"CHANNEL_51", {14, CHANNEL_WISE_LUT}},
336 {"CHANNEL_52", {38, CHANNEL_WISE_LUT}},
337 {"CHANNEL_53", {0, CHANNEL_WISE_LUT}},
338 {"CHANNEL_54", {21, CHANNEL_WISE_LUT}},
339 {"CHANNEL_55", {39, CHANNEL_WISE_LUT}},
340 {"CHANNEL_56", {22, CHANNEL_WISE_LUT}},
341 {"CHANNEL_57", {23, CHANNEL_WISE_LUT}},
342 {"CHANNEL_58", {24, CHANNEL_WISE_LUT}},
343 {"CHANNEL_59", {25, CHANNEL_WISE_LUT}},
344 {"CHANNEL_60", {26, CHANNEL_WISE_LUT}},
345 {"CHANNEL_61", {27, CHANNEL_WISE_LUT}},
346 {"CHANNEL_62", {28, CHANNEL_WISE_LUT}},
347 {"CHANNEL_63", {29, CHANNEL_WISE_LUT}},
348 {"CHANNEL_64", {30, CHANNEL_WISE_LUT}},
349 {"CHANNEL_65", {31, CHANNEL_WISE_LUT}},
350 {"CHANNEL_66", {32, CHANNEL_WISE_LUT}},
351 {"CHANNEL_67", {33, CHANNEL_WISE_LUT}},
352 {"CHANNEL_68", {34, CHANNEL_WISE_LUT}},
353 {"CHANNEL_69", {35, CHANNEL_WISE_LUT}},
354 {"CHANNEL_70", {36, CHANNEL_WISE_LUT}},
355 {"CHANNEL_71", {37, CHANNEL_WISE_LUT}}});
356
357} // namespace sipm_rocv2
forward declare register map LUT types
Definition register_maps_types.h:96
Header defining types stored within the parameter to register mappings.
const Page TOP_LUT
The Look Up Table of for the Top sub-block of an HGC ROC.
Definition sipm_rocv2.h:226
const ParameterLUT PARAMETER_LUT
Entire parameter Look Up Table.
Definition sipm_rocv2.h:267
const Page GLOBAL_ANALOG_LUT
The Look Up Table of for the Global Analog sub-blocks of an HGC ROC.
Definition sipm_rocv2.h:19
const Page MASTER_TDC_LUT
The Look Up Table of for the Master TDC sub-blocks` of an HGC ROC.
Definition sipm_rocv2.h:95
const Page DIGITAL_HALF_LUT
The Look Up Table of for the Digital Half sub-blocks` of an HGC ROC.
Definition sipm_rocv2.h:197
const Page CHANNEL_WISE_LUT
The Look Up Table of for the individual channel sub-blocks` of an HGC ROC.
Definition sipm_rocv2.h:159
const Page REFERENCE_VOLTAGE_LUT
The Look Up Table of for the Reference Voltage sub-blocks of an HGC ROC.
Definition sipm_rocv2.h:67
A parameter for the HGC ROC includes one or more register locations and a default value defined in th...
Definition register_maps_types.h:47
Structure holding a location in the registers.
Definition register_maps_types.h:23