27 {
"DACB_VB_CONV",
Parameter(1,2,6,0b110011)},
30 {
"DACB_VBI_PA",
Parameter(2,2,6,0b011111)},
38 {
"IBO_INV_BUF",
Parameter(6,2,6,0b100110)},
40 {
"IBO_NOINV_BUF",
Parameter(7,2,6,0b100110)},
89 {
"GLOBAL_TA_SELECT_GAIN_TOA",
Parameter(0,0,4,0b0011)},
90 {
"GLOBAL_TA_SELECT_GAIN_TOT",
Parameter(0,4,4,0b0011)},
91 {
"GLOBAL_MODE_NO_TOT_SUB",
Parameter(1,0,1,0)},
92 {
"GLOBAL_LATENCY_TIME",
Parameter(1,1,4,0b1010)},
93 {
"GLOBAL_MODE_FTDC_TOA_S0",
Parameter(1,5,1,0)},
94 {
"GLOBAL_MODE_FTDC_TOA_S1",
Parameter(1,6,1,1)},
95 {
"GLOBAL_SEU_TIME_OUT",
Parameter(1,7,1,1)},
96 {
"BIAS_FOLLOWER_CAL_P_D",
Parameter(2,0,4,0)},
97 {
"BIAS_FOLLOWER_CAL_P_EN",
Parameter(2,4,1,0)},
100 {
"CALIB_CHANNEL_DLL",
Parameter(2,7,1,0)},
102 {
"VD_CTDC_P_DAC_EN",
Parameter(3,5,1,0)},
103 {
"EN_MASTER_CTDC_VOUT_INIT",
Parameter(3,6,1,0)},
104 {
"EN_MASTER_CTDC_DLL",
Parameter(3,7,1,1)},
106 {
"CTDC_CALIB_FREQUENCY",
Parameter(4,2,6,0b000010)},
107 {
"GLOBAL_MODE_TOA_DIRECT_OUTPUT",
Parameter(5,0,1,0)},
108 {
"BIAS_I_CTDC_D",
Parameter(5,1,6,0b011000)},
109 {
"FOLLOWER_CTDC_EN",
Parameter(5,7,1,1)},
110 {
"GLOBAL_EN_BUFFER_CTDC",
Parameter(6,0,1,0)},
111 {
"VD_CTDC_N_FORCE_MAX",
Parameter(6,1,1,1)},
113 {
"VD_CTDC_N_DAC_EN",
Parameter(6,7,1,0)},
114 {
"CTRL_IN_REF_CTDC_P_D",
Parameter(7,0,5,0)},
115 {
"CTRL_IN_REF_CTDC_P_EN",
Parameter(7,5,1,0)},
116 {
"CTRL_IN_SIG_CTDC_P_D",
Parameter(8,0,5,0)},
117 {
"CTRL_IN_SIG_CTDC_P_EN",
Parameter(8,5,1,0)},
118 {
"GLOBAL_INIT_DAC_B_CTDC",
Parameter(8,6,1,0)},
119 {
"BIAS_CAL_DAC_CTDC_P_EN",
Parameter(8,7,1,0)},
121 {
"VD_FTDC_P_DAC_EN",
Parameter(9,5,1,0)},
122 {
"EN_MASTER_FTDC_VOUT_INIT",
Parameter(9,6,1,0)},
123 {
"EN_MASTER_FTDC_DLL",
Parameter(9,7,1,1)},
125 {
"FTDC_CALIB_FREQUENCY",
Parameter(10,2,6,0b000010)},
127 {
"BIAS_I_FTDC_D",
Parameter(11,1,6,0b011000)},
128 {
"FOLLOWER_FTDC_EN",
Parameter(11,7,1,1)},
129 {
"GLOBAL_EN_BUFFER_FTDC",
Parameter(12,0,1,0)},
130 {
"VD_FTDC_N_FORCE_MAX",
Parameter(12,1,1,1)},
132 {
"VD_FTDC_N_DAC_EN",
Parameter(12,7,1,0)},
133 {
"CTRL_IN_SIG_FTDC_P_D",
Parameter(13,0,5,0)},
134 {
"CTRL_IN_SIG_FTDC_P_EN",
Parameter(13,5,1,0)},
135 {
"GLOBAL_INIT_DAC_B_FTDC",
Parameter(13,6,1,0)},
136 {
"BIAS_CAL_DAC_FTDC_P_EN",
Parameter(13,7,1,0)},
137 {
"CTRL_IN_REF_FTDC_P_D",
Parameter(14,0,5,0)},
138 {
"CTRL_IN_REF_FTDC_P_EN",
Parameter(14,5,1,0)},
139 {
"GLOBAL_DISABLE_TOT_LIMIT",
Parameter(15,0,1,0)},
140 {
"GLOBAL_FORCE_EN_CLK",
Parameter(15,1,1,0)},
141 {
"GLOBAL_FORCE_EN_OUTPUT_DATA",
Parameter(15,2,1,0)},
142 {
"GLOBAL_FORCE_EN_TOT",
Parameter(15,3,1,0)}
151 {
"DACB",
Parameter({
RegisterLocation(2,6,2),
RegisterLocation(1,6,2),
RegisterLocation(0,6,2)},0b111111)},
168 {
"DAC_CAL_FTDC_TOA",
Parameter(5,0,6,0)},
170 {
"DAC_CAL_CTDC_TOA",
Parameter(6,0,6,0)},
171 {
"DAC_CAL_FTDC_TOT",
Parameter(7,0,6,0)},
172 {
"DAC_CAL_CTDC_TOT",
Parameter(8,0,6,0)},
173 {
"IN_FTDC_ENCODER_TOA",
Parameter(9,0,6,0)},
174 {
"IN_FTDC_ENCODER_TOT",
Parameter(10,0,6,0)},
177 {
"MASK_ALIGNBUFFER",
Parameter(11,7,1,0)},
190 {
"MULTFACTOR",
Parameter(1,0,5,0b11001)},
192 {
"IDLEFRAME" ,
Parameter({
RegisterLocation(3,0,8),
RegisterLocation(4,0,8),
RegisterLocation(5,0,8),
RegisterLocation(6,0,4)},0b1100110011001100110011001100)},
212 {
"ERROR_LIMIT_SC" ,
Parameter(0,1,3,0b010)},
221 {
"VOUT_INIT_EXT_EN",
Parameter(2,0,1,0)},
222 {
"VOUT_INIT_EXT_D" ,
Parameter(2,1,5,0)},
223 {
"FOLLOWER_PLL_EN" ,
Parameter(3,0,1,1)},
224 {
"BIAS_I_PLL_D" ,
Parameter(3,1,6,0b011000)},
226 {
"PLL_PROBE_AMPLITUDE" ,
Parameter(4,0,3,0b011)},
227 {
"PLL_PROBE_PRE_SCALE" ,
Parameter(4,3,3,0)},
228 {
"PLL_PROBE_PRE_PHASE" ,
Parameter(4,6,2,0)},
229 {
"ET_AMPLITUDE" ,
Parameter(5,0,3,0b011)},
232 {
"SEL_RESYNC_FCMD" ,
Parameter(6,0,1,1)},
234 {
"SEL_STROBE_FCMD" ,
Parameter(6,2,1,1)},
235 {
"SEL_ORBITSYNC_FCMD",
Parameter(6,3,1,1)},
242 {
"GLOBAL_ANALOG", GLOBAL_ANALOG_LUT},
A non-copyable mapping.
Definition register_maps_types.h:91
Header defining types stored within the parameter to register mappings.
const Page TOP_LUT
The Look Up Table of for the Top sub-block of an HGC ROC.
Definition sipm_rocv2.h:210
const ParameterLUT PARAMETER_LUT
Entire parameter Look Up Table.
Definition sipm_rocv2.h:253
const Page GLOBAL_ANALOG_LUT
The Look Up Table of for the Global Analog sub-blocks of an HGC ROC.
Definition sipm_rocv2.h:19
const Page MASTER_TDC_LUT
The Look Up Table of for the Master TDC sub-blocks` of an HGC ROC.
Definition sipm_rocv2.h:88
const Page DIGITAL_HALF_LUT
The Look Up Table of for the Digital Half sub-blocks` of an HGC ROC.
Definition sipm_rocv2.h:185
const Page CHANNEL_WISE_LUT
The Look Up Table of for the individual channel sub-blocks` of an HGC ROC.
Definition sipm_rocv2.h:149
const Page REFERENCE_VOLTAGE_LUT
The Look Up Table of for the Reference Voltage sub-blocks of an HGC ROC.
Definition sipm_rocv2.h:68
A parameter for the HGC ROC includes one or more register locations and a default value defined in th...
Definition register_maps_types.h:45
Structure holding a location in the registers.
Definition register_maps_types.h:20