ecal::EcalRawEncoder Class Reference

Public Member Functions
	EcalRawEncoder (const std::string &name, framework::Process &process)
	Constructor.
virtual	~EcalRawEncoder ()
	Destructor.
virtual void	configure (framework::config::Parameters &)
	Callback for the EventProcessor to configure itself from the given set of parameters.
virtual void	produce (framework::Event &event)
	Process the event and put new data products into it.
Public Member Functions inherited from framework::Producer
	Producer (const std::string &name, Process &process)
	Class constructor.
virtual void	process (Event &event) final
	Processing an event for a Producer is calling produce.
Public Member Functions inherited from framework::EventProcessor
	DECLARE_FACTORY (EventProcessor, EventProcessor *, const std::string &, Process &)
	declare that we have a factory for this class
	EventProcessor (const std::string &name, Process &process)
	Class constructor.
virtual	~EventProcessor ()=default
	Class destructor.
virtual void	beforeNewRun (ldmx::RunHeader &run_header)
	Callback for Producers to add parameters to the run header before conditions are initialized.
virtual void	onNewRun (const ldmx::RunHeader &run_header)
	Callback for the EventProcessor to take any necessary action when the run being processed changes.
virtual void	onFileOpen (EventFile &event_file)
	Callback for the EventProcessor to take any necessary action when a new event input ROOT file is opened.
virtual void	onFileClose (EventFile &event_file)
	Callback for the EventProcessor to take any necessary action when a event input ROOT file is closed.
virtual void	onProcessStart ()
	Callback for the EventProcessor to take any necessary action when the processing of events starts, such as creating histograms.
virtual void	onProcessEnd ()
	Callback for the EventProcessor to take any necessary action when the processing of events finishes, such as calculating job-summary quantities.
template<class T >
const T &	getCondition (const std::string &condition_name)
	Access a conditions object for the current event.
TDirectory *	getHistoDirectory ()
	Access/create a directory in the histogram file for this event processor to create histograms and analysis tuples.
void	setStorageHint (framework::StorageControl::Hint hint)
	Mark the current event as having the given storage control hint from this module_.
void	setStorageHint (framework::StorageControl::Hint hint, const std::string &purposeString)
	Mark the current event as having the given storage control hint from this module and the given purpose string.
int	getLogFrequency () const
	Get the current logging frequency from the process.
int	getRunNumber () const
	Get the run number from the process.
std::string	getName () const
	Get the processor name.
void	createHistograms (const std::vector< framework::config::Parameters > &histos)
	Internal function which is used to create histograms passed from the python configuration @parma histos vector of Parameters that configure histograms to create.

Private Attributes
std::string	input_name_
	input object of encoded data
std::string	input_pass_
	input pass of creating encoded data
std::string	output_name_
	output object to put onto event bus
int	roc_version_
	version of HGC ROC we are decoding

Additional Inherited Members
Protected Member Functions inherited from framework::EventProcessor
void	abortEvent ()
	Abort the event immediately.
Protected Attributes inherited from framework::EventProcessor
HistogramPool	histograms_
	helper object for making and filling histograms
NtupleManager &	ntuple_ {NtupleManager::getInstance()}
	Manager for any ntuples.
logging::logger	the_log_
	The logger for this EventProcessor.

Detailed Description

Definition at line 14 of file EcalRawEncoder.h.

Constructor & Destructor Documentation

EcalRawEncoder()

ecal::EcalRawEncoder::EcalRawEncoder	(	const std::string &	name,
		framework::Process &	process )

Constructor.

Definition at line 14 of file EcalRawEncoder.cxx.

    : Producer(name, process) {}

~EcalRawEncoder()

ecal::EcalRawEncoder::~EcalRawEncoder ( )

virtual

Destructor.

Definition at line 18 of file EcalRawEncoder.cxx.

{}

Member Function Documentation

configure()

void ecal::EcalRawEncoder::configure ( framework::config::Parameters & parameters )

virtual

Callback for the EventProcessor to configure itself from the given set of parameters.

The parameters a processor has access to are the member variables of the python class in the sequence that has class_name equal to the EventProcessor class name.

For an example, look at MyProcessor.

Parameters

parameters

Parameters for configuration.

Reimplemented from framework::EventProcessor.

Definition at line 20 of file EcalRawEncoder.cxx.

                                                            {
  input_name_ = ps.get<std::string>("input_name");
  input_pass_ = ps.get<std::string>("input_pass");
  output_name_ = ps.get<std::string>("output_name");
  roc_version_ = ps.get<int>("roc_version");
}

References framework::config::Parameters::get(), input_name_, input_pass_, output_name_, and roc_version_.

produce()

void ecal::EcalRawEncoder::produce ( framework::Event & event )

virtual

Process the event and put new data products into it.

Parameters

event

The Event to process.

Static parameters depending on ROC version

Translation

Now the HgcrocDigiCollection::Sample class handles the unpacking of individual samples; however, we still need to translate detector IDs into electronics ID and resort the data into grouped by bunch.

Encoding

Now that the samples are sorted into per-bunch groupings, we can start writing this data into the encoded data format documented in the ECal DAQ specifications. Since the class HgcrocDigiCollection::Sample handles the encoding and decoding of specific sample words, we "only" need to actually encode the header information the calculate the CRC checksums.

TODO calculate bunch ID, read request, and orbit from sample ID, event number, and run number placeholder: bunch ID = event number read request = sample ID orbit = run number

Calculate lengths of link sub-packets

Table 4 of ECal DAQ Specifications.

Each ROC link has 3 header words, a common mode channel, and a trailing CRC checksum word. The 3 header words contain a readout map of which channels are included in the DAQ packet, so we end up with.

len of link = 3 + 1 + channels.size() + 1;

The total FPGA packet includes at least 2 header words, a trailing checksum word, and a single word for each four links.

This means we add up the subpacket lengths into subpacket_total and then

n_linkwords = (nlinks/4+(nlinks%4!=0)) total_length = 2 + n_linkwords + subpacket_total + 1;

Encode Bunch Header We have a few words of header material before the actual data. This header material is assumed to be encoded as in Table 3 of the DAQ specs.

<name> (bits)

VERSION (4) | FPGA_ID (8) | NLINKS (6) | 0 | LEN (12) BX ID (12) | RREQ (10) | OR (10) RID ok (1) | CDC ok (1) | LEN3 (6) | RID ok (1) | CDC ok (1) | LEN2 (6) | RID ok (1) | CDC ok (1) | LEN1 (6) | RID ok (1) | CDC ok (1) | LEN0 (6) ... other listing of links ...

Encode lengths of link subpackets

Prepare RO Map bitset

Encode Each Link in Sequence Now we should be decoding each link serially where each link was encoded as in Table 4 of the DAQ specs

ROC_ID (16) | CRC ok (1) | 00000 | RO Map (8) RO Map (32)

TODO: Common-Mode Channel Somewhere in here is where the common-mode channel would be inserted. I'm not sure if we should expect that the common mode channel also has a sample or it will be reserved and never should have a sample

Implements framework::Producer.

Definition at line 27 of file EcalRawEncoder.cxx.

                                                  {
  // static const unsigned int common_mode_channel = roc_version_ == 2 ? 19 : 1;
 
  auto digis{
      event.getObject<ldmx::HgcrocDigiCollection>(input_name_, input_pass_)};
  std::vector<std::map<
      uint16_t, std::map<uint16_t, std::map<uint32_t, uint32_t>  // channel to
                                                                 // sample
                         >                                       // links
      >                                                          // fpgas
              >                                                  // bunches
      sorted_samples(digis.getNumSamplesPerDigi());
 
  auto detmap{
      getCondition<EcalDetectorMap>(EcalDetectorMap::CONDITIONS_OBJECT_NAME)};
  for (auto digi : digis) {
    ldmx::EcalID detid{digi.id()};
    ldmx::EcalElectronicsID eid{detmap.get(detid)};
 
    for (std::size_t i_bx{0}; i_bx < digis.getNumSamplesPerDigi(); i_bx++) {
      sorted_samples[i_bx][eid.fiber()][eid.elink()][eid.channel()] =
          digi.at(i_bx).raw();
    }
  }
 
  std::vector<uint32_t> buffer;
  // word to use for constructing buffer
  static uint32_t word;
  uint32_t i_bx{0};
  for (auto const& bunch : sorted_samples) {
    uint32_t bunch_id = event.getEventNumber();
    uint32_t rreq = i_bx;
    uint32_t orbit = event.getEventHeader().getRun();
 
    // bunch lists the fpgs, links, and channels with their corresponding sample
    for (auto const& [fpga_id, links] : bunch) {
      std::vector<uint32_t> link_lengths;
      for (auto const& [link_id, channels] : links) {
        link_lengths.push_back(3 + 1 + channels.size() + 1);
      }
 
      uint32_t n_linkwords =
          link_lengths.size() / 4 + (link_lengths.size() % 4 != 0);
      uint32_t total_length{2 + n_linkwords + 1};
      for (uint32_t const& link_len : link_lengths) {
        total_length += link_len;
      }
 
      packing::utility::CRC fpga_crc;
      word = 0;
 
      word |= (1 << (12 + 1 + 6 + 8));                                // version
      word |= (fpga_id & packing::utility::MASK<8>) << (12 + 1 + 6);  // FPGA
      word |= (links.size() & packing::utility::MASK<6>) << (12 + 1);  // NLINKS
      word |= (total_length & packing::utility::MASK<12>);  // LEN TODO
      buffer.push_back(word);
      fpga_crc << word;
 
      word = 0;
      word |= (bunch_id & packing::utility::MASK<12>) << 20;  // BX ID
      word |= (rreq & packing::utility::MASK<10>) << 10;      // RREQ
      word |= (orbit & packing::utility::MASK<10>);           // OR
      buffer.push_back(word);
      fpga_crc << word;
 
      for (uint32_t i_linkword{0}; i_linkword < n_linkwords; i_linkword++) {
        word = 0;
        for (uint32_t i_linklen{0}; i_linklen < 4; i_linklen++) {
          uint32_t i_link = 4 * i_linkword + i_linklen;
          if (i_link <= link_lengths.size()) {
            // we have a link
            word |= (((0b11 << 6) +
                      (link_lengths.at(i_link) & packing::utility::MASK<6>))
                     << 8 * i_linklen);
          }  // do we have a link for this linklen subword?
        }  // loop through subwords in this word
        buffer.push_back(word);
        fpga_crc << word;
      }  // loop through words
 
      // fpga lists the links and channels with their corresponding sample
      for (auto const& [link_id, channels] : links) {
        std::bitset<40> ro_map;  // starts as all 0s
        ro_map.set(0);           // special "header" word from ROC
        ro_map.set(39);          // trailing checksum from ROC
        // each link maps the channels that were readout to their sample
        for (auto const& [channel, sample] : channels) {
          ro_map.set(channel);
        }
 
        packing::utility::CRC link_crc;
        word = 0;
        word |= (link_id & packing::utility::MASK<16>) << 16;
        word |= 1 << 15;
        // put first 8bits of RO Map in first header word
        word |= (ro_map >> 32).to_ulong();
 
        buffer.push_back(word);
        fpga_crc << word;
        link_crc << word;
 
        // next header word is end of RO map
        word = (ro_map.to_ulong() & 0xFFFFFFFF);
        buffer.push_back(word);
        fpga_crc << word;
        link_crc << word;
 
        // special "header" word from ROC
        word = 0;
        word |= 0b0101 << 28;
        word |= (bunch_id & packing::utility::MASK<12>) << 16;
        word |= (rreq & packing::utility::MASK<6>) << 10;
        word |= (orbit & packing::utility::MASK<3>) << 7;
        // skipping hamming error bits because we will set them all to false
        // here
        word |= 0b0101;
        buffer.push_back(word);
        fpga_crc << word;
        link_crc << word;
 
        // put samples into buffer
        for (auto const& [channel, sample] : channels) {
          buffer.push_back(sample);
          fpga_crc << sample;
          link_crc << sample;
        }
        buffer.push_back(link_crc.get());
        fpga_crc << link_crc.get();
      }
    }
    i_bx++;
  }
 
  event.add(output_name_, buffer);
 
  return;
}  // produce

References ecal::EcalDetectorMap::CONDITIONS_OBJECT_NAME, packing::utility::CRC::get(), framework::EventProcessor::getCondition(), input_name_, input_pass_, and output_name_.

Member Data Documentation

input_name_

std::string ecal::EcalRawEncoder::input_name_

private

input object of encoded data

Definition at line 36 of file EcalRawEncoder.h.

Referenced by configure(), and produce().

input_pass_

std::string ecal::EcalRawEncoder::input_pass_

private

input pass of creating encoded data

Definition at line 38 of file EcalRawEncoder.h.

Referenced by configure(), and produce().

output_name_

std::string ecal::EcalRawEncoder::output_name_

private

output object to put onto event bus

Definition at line 40 of file EcalRawEncoder.h.

Referenced by configure(), and produce().

roc_version_

int ecal::EcalRawEncoder::roc_version_

private

version of HGC ROC we are decoding

Definition at line 42 of file EcalRawEncoder.h.

Referenced by configure().

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The documentation for this class was generated from the following files:

• Ecal/include/Ecal/EcalRawEncoder.h
• Ecal/src/Ecal/EcalRawEncoder.cxx