HcalRawDecoder.h

#ifndef HCALRAWDECODER_H
#define HCALRAWDECODER_H
 
#include <bitset>
 
#include "DetDescr/HcalElectronicsID.h"
#include "Framework/EventProcessor.h"
#include "Packing/Utility/CRC.h"
#include "Packing/Utility/Mask.h"
#include "Packing/Utility/Reader.h"
#include "Recon/Event/HgcrocDigiCollection.h"
namespace hcal {
 
struct PolarfireEventHeader {
  int version_;
  int fpga_;
  int nsamples_;
  int spill_;
  int ticks_;
  int bunch_;
  int number_;
  int run_;
  int dd_;
  int month_;
  int hh_;
  int mm_;
  std::vector<bool> good_bxheader_;
  std::vector<bool> good_trailer_;
 
  void board(framework::Event& event, const std::string& prefix);
};
 
class HcalRawDecoder : public framework::Producer {
 public:
  HcalRawDecoder(const std::string& name, framework::Process& process)
      : framework::Producer(name, process) {}
  virtual ~HcalRawDecoder() = default;
  void configure(framework::config::Parameters&) override;
  void beforeNewRun(ldmx::RunHeader& rh) override;
  void produce(framework::Event& event) override;
 
 private:
  template <typename ReaderType>
  std::map<ldmx::HcalElectronicsID,
           std::vector<ldmx::HgcrocDigiCollection::Sample>>
  read(ReaderType& reader, PolarfireEventHeader& eh) {
    static const unsigned int common_mode_channel = roc_version_ == 2 ? 19 : 1;
    static const unsigned int calib_channel = 20;
    static uint32_t head1, head2, w;
 
    // special header words not counted in event length
    do {
      reader >> head1;
    } while (head1 != 0xbeef2021 and head1 != 0xbeef2022);
 
    long int eventlen;
    long int i_event{0};
    /* whole event header word looks like
     *
     * VERSION (4) | FPGA ID (8) | NSAMPLES (4) | LEN (16)
     */
    reader >> head1;
    i_event++;
 
    eh.version_ = (head1 >> 28) & packing::utility::MASK<4>;
    eh.fpga_ = (head1 >> 20) & packing::utility::MASK<8>;
    eh.nsamples_ = (head1 >> 16) & packing::utility::MASK<4>;
    eventlen = head1 & packing::utility::MASK<16>;
    if (eh.version_ == 1u) {
      // eventlen is 32-bit words in event
      // do nothing here
    } else if (eh.version_ == 2u) {
      // eventlen is 64-bit words in event,
      // need to multiply by 2 to get actual 32-bit event length
      eventlen *= 2;
      // and subtract off the special header word above
      eventlen -= 1;
    } else {
      EXCEPTION_RAISE(
          "VersMis",
          "HcalRawDecoder only knows version 1 and 2 of DAQ format.");
    }
    // sample counters
    int n_words{0};
    std::vector<uint32_t> length_per_sample(eh.nsamples_, 0);
    for (uint32_t i_sample{0}; i_sample < eh.nsamples_; i_sample++) {
      if (i_sample % 2 == 0) {
        n_words++;
        reader >> w;
        i_event++;
      }
      uint32_t shift_in_word = 16 * (i_sample % 2);
      length_per_sample[i_sample] =
          (w >> shift_in_word) & packing::utility::MASK<12>;
    }
 
    if (eh.version_ == 2) {
      for (int i_word{n_words}; i_word < 8; i_word++) {
        reader >> head1;
        i_event++;
      }
 
      reader >> head1;
      i_event++;
      eh.spill_ = ((head1 >> 12) & 0xfff);
      eh.bunch_ = (head1 & 0xfff);
      reader >> head1;
      i_event++;
      eh.ticks_ = head1;
      reader >> head1;
      i_event++;
      eh.number_ = head1;
      reader >> head1;
      i_event++;
      eh.run_ = (head1 & 0xFFF);
      eh.dd_ = (head1 >> 23) & 0x1F;
      eh.mm_ = (head1 >> 28) & 0xF;
      eh.hh_ = (head1 >> 18) & 0x1F;
      eh.mm_ = (head1 >> 12) & 0x3F;
    }
 
    // fill map of **electronic** IDs to the digis that were read out
    std::map<ldmx::HcalElectronicsID,
             std::vector<ldmx::HgcrocDigiCollection::Sample>>
        eid_to_samples;
    std::size_t i_sample{0};
    while (i_event < eventlen) {
      reader >> head1 >> head2;
      i_event += 2;
      packing::utility::CRC fpga_crc;
      fpga_crc << head1;
 
      [[maybe_unused]] uint32_t hgcroc_version =
          (head1 >> 28) & packing::utility::MASK<4>;
      uint32_t fpga = (head1 >> 20) & packing::utility::MASK<8>;
      uint32_t nlinks = (head1 >> 14) & packing::utility::MASK<6>;
      [[maybe_unused]] uint32_t len = head1 & packing::utility::MASK<12>;
 
      fpga_crc << head2;
 
      [[maybe_unused]] uint32_t bx_id =
          (head2 >> 20) & packing::utility::MASK<12>;
      [[maybe_unused]] uint32_t rreq =
          (head2 >> 10) & packing::utility::MASK<10>;
      [[maybe_unused]] uint32_t orbit = head2 & packing::utility::MASK<10>;
 
      std::vector<uint32_t> length_per_link(nlinks, 0);
      for (uint32_t i_link{0}; i_link < nlinks; i_link++) {
        if (i_link % 4 == 0) {
          i_event++;
          reader >> w;
          fpga_crc << w;
        }
        uint32_t shift_in_word = 8 * (i_link % 4);
        [[maybe_unused]] bool rid_ok =
            ((w >> (shift_in_word + 7)) & packing::utility::MASK<1>) == 1;
        [[maybe_unused]] bool cdc_ok =
            ((w >> (shift_in_word + 6)) & packing::utility::MASK<1>) == 1;
        length_per_link[i_link] =
            (w >> shift_in_word) & packing::utility::MASK<6>;
      }
 
      eh.good_bxheader_.resize(nlinks);
      eh.good_trailer_.resize(nlinks);
      for (uint32_t i_link{0}; i_link < nlinks; i_link++) {
        if (length_per_link.at(i_link) < 2) {
          continue;
        }
        // move on from last word counting links or previous link
        packing::utility::CRC link_crc;
        i_event++;
        reader >> w;
        fpga_crc << w;
        link_crc << w;
        [[maybe_unused]] uint32_t roc_id =
            (w >> 16) & packing::utility::MASK<16>;
        [[maybe_unused]] bool crc_ok =
            ((w >> 15) & packing::utility::MASK<1>) == 1;
 
        // get readout map from the last 8 bits of this word
        // and the entire next word
        std::bitset<40> ro_map = w & packing::utility::MASK<8>;
        ro_map <<= 32;
        i_event++;
        reader >> w;
        fpga_crc << w;
        link_crc << w;
        ro_map |= w;
        // loop through channels on this link,
        //  since some channels may have been suppressed because of low
        //  amplitude the channel ID is not the same as the index it
        //  is listed in.
        int j{-1};
        for (uint32_t i_word{2}; i_word < length_per_link.at(i_link);
             i_word++) {
          // skip zero-suppressed channel IDs
          do {
            j++;
          } while (j < 40 and not ro_map.test(j));
 
          // next word is this channel
          i_event++;
          reader >> w;
          fpga_crc << w;
 
          if (j == 0) {
            link_crc << w;
            // v2
            eh.good_bxheader_[i_link] = ((w & 0xff000000) == 0xaa000000);
            // v3
            //
            // Shadows a previous declaration but is never used so renamed here
            [[maybe_unused]] uint32_t v3_bx_id =
                (w >> 16) & packing::utility::MASK<12>;
            [[maybe_unused]] uint32_t short_event =
                (w >> 10) & packing::utility::MASK<6>;
            [[maybe_unused]] uint32_t short_orbit =
                (w >> 7) & packing::utility::MASK<3>;
            [[maybe_unused]] uint32_t hamming_errs =
                (w >> 4) & packing::utility::MASK<3>;
          } else if (j == common_mode_channel) {
            link_crc << w;
          } else if (j == calib_channel) {
            // calib channel
            link_crc << w;
          } else if (j == 39) {
            // trailer on each link added by ROC
            // ROC v2 - IDLE word
            // ROC v3 - CRC checksum
            if (roc_version_ == 2) {
              bool good_idle = (w == 0xaccccccc);
              eh.good_trailer_[i_link] = good_idle;
            } else {
              bool good_crc = (link_crc.get() == w);
              eh.good_trailer_[i_link] = good_crc;
            }
            /*
            if (roc_version_ > 2 and link_crc.get() != w) {
              EXCEPTION_RAISE("BadCRC",
                              "Our calculated link checksum doesn't match the "
                              "one from raw data.");
            }
            */
          } else {
 
            link_crc << w;
            ldmx::HcalElectronicsID eid(fpga, i_link,
                                        j - 1 - 1 * (j > common_mode_channel) -
                                            1 * (j > calib_channel));
            // copy data into EID->sample map
            eid_to_samples[eid].emplace_back(w);
          }  // type of channel
        }  // loop over channels (j in Table 4)
      }  // loop over links
 
      // another CRC checksum from FPGA
      i_event++;
      reader >> w;
      [[maybe_unused]] uint32_t crc = w;
      /* TODO
       *  fix calculation of FPGA checksum
       *  I can't figure out why it isn't matching, but there
       *  is definitely a word here where the FPGA checksum would be.
      if (fpga_crc.get() != crc) {
        EXCEPTION_RAISE(
            "BadCRC",
            "Our calculated FPGA checksum doesn't match the one read in.");
      }
      */
      // padding to reach 64-bit boundary in version 2
      if (eh.version_ == 2u and length_per_sample.at(i_sample) % 2 == 1) {
        i_event++;
        reader >> head1;
      }
      i_sample++;
    }
 
    if (eh.version_ == 1u) {
      // special footer words
      reader >> head1 >> head2;
    }
 
    return eid_to_samples;
  }
 
 private:
  std::string input_file_;
  std::vector<std::string> input_names_;
  std::string input_pass_;
  std::string output_name_;
  std::string detector_name_;
  int roc_version_;
  bool translate_eid_;
  bool read_from_file_;
 
 private:
  packing::utility::Reader file_reader_;
};
}  // namespace hcal
#endif /* HCALRAWDECODER_H */